1.8-GHz Six-Port-Based Impedance Modulator Using CMOS Technology

نویسندگان
چکیده

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Design of Second-order Sigma-delta Modulator Using Cmos Technology

DESIGN OF SECOND-ORDER SIGMA-DELTA MODULATOR USING CMOS TECHNOLOGY

متن کامل

Ultra-wideband CPW Six-port Circuits Based on Multilayer Technology

In this paper, a new multilayer six-port circuit using ultra-wideband directional coupler is presented and implemented. The use of the multilayer technology allows having a compact circuit and a very large bandwidth. To validate this concept, a six-port prototype was fabricated and measured. Simulation and measurement results show the proposed six-port circuit can easily operate over an ultra-w...

متن کامل

A New Six-port Junction Based on Multilayer Technology

A novel design of compact six-port circuit is proposed for millimeter-wave integrated system design. All the structure is based on the use of an elliptic coupler with certain geometrical characteristics. The prototype circuit occupies only 66.5 % of the size of the conventional six-port junction at the same frequency. To examine the performance of the proposed circuit, the six-port using multil...

متن کامل

V-band Quadrature Phase Shift Keying De- Modulator Using Wr-12 Six-port

Abstract—A direct 61GHz demodulator, based on a rectangular waveguide (WR-12) six-port, is presented in this letter. The six-port device, composed of four 90◦ hybrid couplers fabricated in a metal block of brass, is implemented in ADS software. Good agreement between QPSK demodulation results using an ideal six-port model and a second one, based on the S-parameter measurements of a 61GHz hybrid...

متن کامل

Micromachined 28-GHz Power Divider in CMOS Technology

A broad-band power divider is presented in CMOS technology. The devices are realized by postprocessing chips that are fabricated in a standard 1.2m CMOS process. Developed postprocessing includes wire bonding for ground equalization, deposition of a stress-compensation layer, and selective etching of the silicon substrate. By employing coupled coplanar transmission lines, the area of dividers i...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: The Journal of Korean Institute of Electromagnetic Engineering and Science

سال: 2018

ISSN: 1226-3133,2288-226X

DOI: 10.5515/kjkiees.2018.29.5.383